This invention relates to a generator for supplying properly phased constant width drive pulses to a television deflection circuit.
All deflection circuits utilized in television receivers must provide for synchronization of the deflection signals produced thereby with synchronizing pulses recovered from the composite video signals being received by the television receiver or control signals locked to the synchronizing pulses. The deflection circuit may be one of many different types such as silicon controlled rectifier (SCR) type such as shown in U.S. Pat. No. 3,452,244. This type of deflection circuit requires a drive pulse of a uniform width during each deflection cycle to initiate a commutating interval. A lack of uniformity of drive pulse from one cycle to another can result in improper operation of the deflection circuit.
Because of inherent delay in the deflection circuit, the deflection signals produced thereby are delayed in time with respect to the drive pulses. Additionally the amount of delay may be a function of the loading of the deflection circuit, i.e., the greater the load the greater the delay.
To provide for synchronization of the deflection signals with the control signals, compensation must be provided for the aforementioned delay associated with the deflection circuit.
An integrated form of a circuit which performs the function of synchronization of the deflection signals with the control signals is most desirable. Prior art means utilized in integrated circuits to perform the synchronizing function have shifted the leading edge of the drive pulse supplied to the deflection circuit to compensate for the delay. However, the resulting change of drive pulse width resulting therefrom is not acceptable for use with SCR type deflection circuits as aforementioned.